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CoreClocks provides the resulting frequencies of the clocking configuration. But often that's not sufficient to understand or debug it.
Being able to see the actual divider and clock mux choices would help a lot when trying to match a desired clock configuration with the one the HAL chooses. That can e.g. be addressed with adding a bunch of debug!() prints. Currently the PLL and RCC setup routines are silent and partially black boxes.
@SingularitySurfer
The text was updated successfully, but these errors were encountered:
+1 from me also. Printing via the log crate expects that users have a working log implementation (for example by copying one from the examples). I think that's reasonable.
318: RCC debug prints r=richardeoin a=SingularitySurfer
I'm thinking about how to implement RCC debug prints #314 in the cleanest fashion.
There is a lot going on in the RCC setup and a complete feedback about all the exact register settings is a substantial amount of information that is not easily made human readable.
I think what would make sense is to give feedback corresponding to the Clock Configuration in CubeMX:
![Screenshot from 2022-02-16 12-36-19](https://user-images.githubusercontent.com/17088194/154256988-7b1cbf24-2b81-46b8-a087-e5388fb11f0c.png)
That would be all the MUX settings, prescalers, dividers and the PLL-frac.
I could have one compact codeblock at the end of the freeze function where I read the necessary registers again and give the formatted debug info (currently its just printing raw reg bits).
https://github.com/stm32-rs/stm32h7xx-hal/blob/d924165915c74f34e8b1610934afc20e133b10e5/src/rcc/mod.rs#L976-L977
The other option would be to sprinkle in the debug statements within the macros that setup PLLs etc. This would not necessitate reading the registers again but the code would be less clean.
Lastly I want to ask if using the log crate like this is OK or if we would rather use [defmt](https://crates.io/crates/defmt)?
Co-authored-by: SingularitySurfer <[email protected]>
Co-authored-by: SingularitySurfer <[email protected]>
CoreClocks
provides the resulting frequencies of the clocking configuration. But often that's not sufficient to understand or debug it.Being able to see the actual divider and clock mux choices would help a lot when trying to match a desired clock configuration with the one the HAL chooses. That can e.g. be addressed with adding a bunch of
debug!()
prints. Currently the PLL and RCC setup routines are silent and partially black boxes.@SingularitySurfer
The text was updated successfully, but these errors were encountered: